Renesas Electronics has launched the industry's first 650V gallium nitride (GaN) device featuring dual-side cooling, specifically targeted at high-density power conversion in 800V high-voltage DC AI data center architectures. The innovation addresses the critical thermal and efficiency challenges of megawatt-scale data center power systems.
Overview: Breaking Thermal Barriers in Megawatt-Scale AI Data Centers
Renesas Electronics Corporation has officially launched the industry’s first 650V gallium nitride (GaN) device featuring dual-side cooling, a breakthrough aimed at high-density power conversion in 800V high-voltage DC (HVDC) AI data center architectures. The new TP65H020G4PLSGBD D-Mode device addresses the critical thermal and spatial constraints inherent in next-generation megawatt-scale data centers. By enabling more power to be processed within a significantly reduced footprint, Renesas is providing a vital hardware upgrade for hyperscalers and original equipment manufacturers navigating the extreme power demands of modern AI workloads.
Technical Details: Gen IV Plus GaN and Dual-Side Cooling Mechanics
Built on Renesas’s Gen IV Plus GaN architecture, the TP65H020G4PLSGBD delivers an exceptionally low on-resistance of 20 milliohms (mΩ) in an ultra-compact 8×8mm PQFN package. This represents one of the lowest on-resistances available in the 650V class. The defining innovation is its dual-side cooled (DSC) package, which dissipates heat from both the top and bottom of the device. This dual-dissipation approach lowers top-side thermal impedance by 10% compared to conventional top-side-cooled packages.
Furthermore, the 8×8mm footprint is 57% smaller than the existing 10×15mm TOLT package. The device incorporates low gate charge, low output capacitance, a built-in freewheeling diode with minimal reverse recovery, and a high threshold voltage that operates without a negative gate bias. Engineers can drive the device using standard silicon gate drivers and switch into the MHz frequency range. This capability minimizes passive components and cuts overall bill of materials costs without requiring specialized E-mode drivers.
Architectural Integration: The 800V HVDC Ecosystem
The new GaN device is purpose-built to support up to 700V operation, specifically targeting the 800V DC/DC intermediate bus converter (IBC) stage. This critical stage is responsible for stepping down voltage to 48V, 12V, or 6V for downstream distribution. Additionally, it is explicitly designed for the battery backup (BBU) and capacitor bank (CBU) stages within the sidecar power rack. To provide a comprehensive single-source path, the GaN device integrates seamlessly with Renesas AUX controllers, gate drivers, and microcontrollers, creating a unified, scalable power solution for 800V architectures.
Market Context: The Megawatt Rack Challenge
As AI infrastructure evolves, rack power is climbing rapidly from approximately 120 kW toward the megawatt scale. In this high-density environment, physical space and heat dissipation have become the primary bottlenecks limiting further scaling. Traditional top-side cooling relies on heatsinks that consume valuable vertical clearance, making dual-side cooling a paradigm shift for dense rack layouts. John Wiggenhorn, Senior Product Line Director of High-Voltage GaN at Renesas, noted that customers building these facilities are running out of board space and thermal headroom before reaching their power limits. The DSC technology allows designers to move more power through the intermediate bus without redrawing the board or adding supplementary cooling hardware, offering an extremely easy upgrade path that maintains operational simplicity.
Implications for AI Data Centers: Power Density and Efficiency Gains
Renesas has already validated the DSC approach in silicon through rigorous reference designs. A 6kW, 800V-to-48V LLC DC transformer (DCX) reference design, controlled by a Renesas RA6T3 MCU, achieves a remarkable power density of 2.6 kW/in³. Per-module testing demonstrated that the full-load efficiency is 0.21% higher than an equivalent TOLT-based board. While seemingly marginal in isolation, this efficiency gain translates to significant thermal reductions and energy savings at the megawatt scale. The smaller package not only saves critical PCB space but also enables a better-matched layout across the FETs. Similar enhanced performance, scalability, and power density levels are being leveraged in 800V-to-12V and 6V DC/DC IBC reference designs, proving the platform's versatility.
Future Outlook: Sampling, Mass Production, and Industry Adoption
The TP65H020G4PLSGBD is currently sampling to major AI data center OEMs and ODMs, with mass production scheduled for mid-2027. The DSC PQFN package was defined in collaboration with major AI infrastructure customers to ensure an industry-standard footprint for sourcing flexibility. Renesas will showcase the new device and its broader 800V power solutions at the OCP Global Summit in San Jose, California, from October 12-15, 2026, signaling a major step forward in high-density power conversion for the AI era.