Navitas Semiconductor and Microchip Technology have introduced a reference design that converts 800V DC to 6V DC specifically for AI data centers. The solution leverages GaNFast power ICs and microcontrollers to align with the Open Compute Project (OCP) 800V DC standard, addressing the high power density needs of modern GPU clusters.
Overview of the 800V-to-6V Power Architecture
As artificial intelligence data centers scale to support increasingly high-power GPU clusters, the industry is undergoing a fundamental shift toward 800V DC rack power architectures. This transition is critical to improving distribution efficiency, increasing overall power density, and supporting next-generation server designs. To facilitate this evolution, Navitas Semiconductor and Microchip Technology have collaborated on a comprehensive 800V DC-to-6V DC reference design specifically tailored for AI data center rack power applications. Aligned with the Open Compute Project (OCP) 800V DC standard, this joint solution provides developers with reference hardware, software, and extensive design documentation intended to reduce design risk and accelerate the deployment of advanced AI infrastructure.
Technical Details of the GaN Power Stage
The physical power distribution board (PDB) at the core of this reference platform leverages Navitas’ GaNFast gallium nitride (GaN) power devices. The primary side utilizes a stacked half-bridge topology powered by 16 NV6034, 650V, 17mΩ GaNFast FETs. These components are housed in a DFN8×8 dual-side-cooled package, a design choice that significantly reduces the thermal resistance of the GaN devices. This advanced thermal management allows for higher continuous power operation while maintaining exceptional efficiency. The platform is engineered to deliver up to 96% peak efficiency at full load, operating at a 1 MHz switching frequency to enable a remarkable power density of 2,100 W/in³. Crucially, the direct conversion from 800V DC to 6V DC consolidates traditional multi-stage conversion processes into a single, highly efficient converter.
Digital Control and the dsPIC33AK Architecture
Managing this high-frequency power conversion requires precise digital control, which is provided by Microchip’s dsPIC33AK Digital Signal Controllers (DSCs). The dsPIC33AK256MPS306 family is powered by a 200 MHz 32-bit core equipped with a double-precision floating-point unit (FPU). To support fast, deterministic control loops necessary for high-efficiency DC/DC conversion, the controller features 78 ps high-resolution Pulse Width Modulators (PWMs) and multiple 12-bit Analog-to-Digital Converters (ADCs) capable of operating at up to 40 MSPS. This combination of a high-speed core and advanced peripherals ensures the high-resolution control and high-speed analog processing required for next-generation power supplies.
Hardware Security and Post-Quantum Cryptography
As power infrastructure becomes increasingly connected, security is paramount. The reference design integrates Microchip's TA100 CryptoAuthentication device to address growing security requirements within modern data centers. By embedding hardware-based security, developers can establish a trusted foundation for system authentication without the complexity of building security measures from scratch. The TA100 supports code authentication for secure boot, Message Authentication Code (MAC) generation, trusted firmware updates, and multiple key management protocols, including Transport Layer Security (TLS). Furthermore, the dsPIC33AK offers library support for the Commercial National Security Algorithm (CNSA) Suite 2.0 recommended post-quantum cryptographic (PQC) algorithms, featuring hardware-accelerated cryptographic functions essential for OCP power supplies and connected real-time control designs.
Implications for AI Data Center Infrastructure
The physical footprint of the reference design is approximately 20% thinner than a standard mobile phone. This ultra-low profile is a critical mechanical advantage, allowing the power distribution board to be integrated closely with the GPU board. Such close proximity significantly improves transient performance and power distribution efficiency, which are vital for the dynamic power demands of AI workloads. Vipin Bothra, vice president of Global Solution Marketing at Navitas Semiconductor, emphasized that Navitas’ GaNFast technology is a critical enabler of higher power density and improved system performance. By translating system-level GaN advances into measurable improvements in efficiency and total cost of ownership, the collaboration directly addresses the evolving form-factor and performance requirements of modern AI racks.
Future Outlook and Industry Availability
The transition to higher-voltage rack power systems represents a major milestone for the data center industry. Joe Thomsen, corporate vice president of Microchip's digital signal controller business unit, noted that AI infrastructure optimization is driving one of the most significant power architecture transitions in decades. The collaboration provides the proven building blocks necessary for developers to navigate this shift and accelerate innovation. The complete reference design, including the reference board, software, and supporting documentation, will be officially showcased at Microchip's OCP Event, taking place from October 12 to 15, 2026, in San Jose, California. This release will equip system developers with the comprehensive resources needed to evaluate and deploy 800V DC power conversion systems for next-generation AI data center applications.