Infineon and NVIDIA have deepened their partnership on 800V DC power delivery architecture for AI data centers, extending their original May 2025 collaboration to focus on high-voltage intermediate bus converters (HV IBC). The expanded effort applies GaN-based system solutions at the HV IBC stage to handle rising power density demands in AI racks. Gradual deployment is expected to begin in 2027.
Overview
Infineon Technologies announced on October 21, 2026, during NVIDIA's GTC developer conference in Berlin, an expansion of its collaboration with NVIDIA in AI data center power delivery. Under the expanded effort, the two companies will jointly develop high-voltage intermediate bus converter (IBC) solutions based on gallium nitride (GaN) power devices for 800V direct current (800V DC) architectures. The announcement builds on the 800V DC power delivery initiative the two companies launched in 2025, which initially covered both silicon carbide (SiC) and GaN technologies. The new phase places greater emphasis on GaN specifically for intermediate bus conversion, while Infineon continues to supply SiC devices, power protection components, and other power products into the broader ecosystem.
The High-Voltage IBC as a Critical Link
The high-voltage intermediate bus converter sits at a pivotal point in the AI data center power delivery chain. It is the stage where the high-voltage DC bus is stepped down to the lower rails that server motherboards and processors actually consume. Infineon frames the IBC as a key component in that chain, and its expanded work with NVIDIA targets power conversion for high-power AI racks rather than the upstream grid interface alone. Because the converter must handle both the voltage step-down and the electrical behavior of the downstream load, its efficiency, thermal profile, and switching characteristics propagate through the rest of the rack design.
Technical Details: GaN Switching at 800V
Leveraging its CoolGaN product portfolio, Infineon will address multiple conversion configurations, including 800V-to-50V and 800V-to-12V, using high-frequency switching technology. High-frequency operation is central to the value proposition: it allows magnetics and passive components to shrink while conversion efficiency is maintained or improved, which matters when rack-level power budgets are constrained by cooling and space rather than by the grid connection itself. The solutions are intended for NVIDIA's MGX open modular reference architecture for AI factories, meaning the converter designs are positioned to slot into a standardized rack and system framework rather than into bespoke, one-off power shelves.
Hot-Swapping, Pre-Charging, and Serviceability
Beyond raw conversion, the expanded collaboration targets operational behavior that is often overlooked in power semiconductor announcements. The solutions are designed to enable controlled pre-charging and discharging of server motherboards, as well as hot-swapping while the rack remains operational. Pre-charging is what prevents damaging inrush currents when a board or module is inserted into a live bus; controlled discharging protects service personnel and downstream components during removal. Combined with hot-swap support, these capabilities aim to reduce the risk of service disruptions during data center maintenance, allowing a rack to stay in service while individual elements are exchanged. The announcement explicitly notes that the collaboration will support hot-swappable server rack maintenance.
Market Context: Power Density at the Rack Level
The architectural backdrop is a steady rise in rack-level power consumption. The 800V DC power architecture described by the companies is designed for AI computing systems with power consumption of up to 1 MW per rack, with deployment expected to begin gradually in 2027. At that scale, the losses and copper mass associated with conventional lower-voltage distribution become increasingly difficult to justify. NVIDIA's 800V DC architecture is intended to simplify the multiple AC-to-DC and DC-to-DC conversion stages used in conventional data centers, reducing the number of conversion stages and the associated component count. Fewer stages means fewer points of loss and fewer components to cool, which is why the intermediate bus stage receives so much attention even though it is only one link in the chain.
Industry Impact and Ecosystem Formation
The 800V DC effort is not a bilateral supply arrangement in isolation. The ecosystem brings together power semiconductor suppliers, power system manufacturers, and data center infrastructure providers. Infineon is among the suppliers participating in that ecosystem with portfolios spanning SiC, GaN, and silicon-based power devices, and it positions its participation as covering the power delivery chain from the grid to the AI processors. That breadth matters competitively: the intermediate bus conversion decision is entangled with upstream rectification, protection, and downstream point-of-load design, so suppliers that can span multiple device technologies and stages are better placed to influence reference architectures such as MGX.
Implications for AI Data Centers
The stated goals of the expanded GaN work are to increase power density, reduce power losses across the delivery chain, and lower cooling hardware requirements. Each of these maps directly onto known constraints in AI data center construction. Higher power density reduces the physical footprint and distribution hardware needed per unit of compute. Lower losses reduce both operating cost and the heat that must be removed. Reduced cooling hardware requirements compound the benefit, since cooling itself consumes power and occupies space. The pre-charge, discharge, and hot-swap features address a different but equally practical constraint: availability. Maintenance that requires taking an entire rack offline becomes more expensive as rack power and the value of the compute inside it rise.
Future Outlook
The timeline disclosed by the companies is gradual deployment beginning in 2027, which places the transition well after the current generation of AI infrastructure deployments. That schedule reflects the reality that a change in rack-level power architecture requires coordination across semiconductor supply, power shelf and busbar design, server platform validation, and facility-level electrical design. The shift in emphasis from a dual SiC-and-GaN initiative launched in May 2025 to a GaN-focused intermediate bus effort announced in October 2026 suggests the companies have identified the conversion stage where GaN's high-frequency switching characteristics deliver the most leverage. Whether that emphasis holds will depend on how the MGX-aligned designs perform in volume deployment, but the direction of travel, toward fewer conversion stages and higher bus voltages, is now clearly established by the ecosystem participants.