Overview

Infineon and NVIDIA are expanding their collaboration to develop gallium nitride (GaN)-based power converters for 800V DC AI data centers. The announcement, dated October 26, 2026, positions the partnership around NVIDIA's MGX architecture, with the stated goals of improving efficiency, increasing power density, reducing cooling requirements, and supporting racks that consume up to 1 MW. According to the companies, deployment is expected to begin gradually in 2027.

The collaboration is significant less for the individual components involved than for what it signals about data center power architecture. As AI racks scale toward the megawatt class, the distribution path from the grid to the processor becomes a first-order design constraint rather than a secondary engineering detail. Infineon's GaN devices and PSoC controllers are being directed at the high-voltage intermediate bus converter stage, the point in the power chain where conversion losses and thermal density compound most aggressively.

Technical Details: GaN in the Intermediate Bus Stage

The technical substance of the collaboration centers on applying GaN semiconductors alongside Infineon PSoC controllers to high-voltage intermediate bus converters operating at switching frequencies up to 1 MHz. That combination is notable for two reasons.

First, GaN transistors exhibit lower switching and conduction losses than silicon MOSFETs at high voltages and high frequencies, which matters directly when the input rail is 800V DC. Second, pushing switching frequencies to the 1 MHz range allows magnetics, capacitors, and the surrounding passive network to shrink. In power converter design, switching frequency and passive component volume trade off against each other; higher frequency permits a smaller, denser converter, but it demands devices that can switch cleanly without disproportionate loss.

The PSoC controller role is equally structural. At megahertz switching frequencies, control loop timing, gate drive sequencing, and protection response must be tightly coordinated with the power stage. A programmable controller integrated with GaN power devices gives designers a path to tune the converter for the specific load profile of an AI rack, which is characterized by large, fast transients rather than steady-state draw.

Why 800V DC Changes the Distribution Equation

Rack power of up to 1 MW is the constraint driving the shift toward 800V DC distribution. At a fixed power level, raising the distribution voltage reduces current, and lower current reduces resistive losses along the busbar and cabling. For a megawatt-scale rack, those losses are not marginal; they translate into heat that must be removed from an already thermally dense enclosure.

The intermediate bus converter sits at the boundary between the high-voltage DC distribution layer and the lower-voltage rails that feed compute hardware. Every percentage point of conversion efficiency at that stage is multiplied across the full rack load, and the waste heat generated there must be managed by the facility cooling system. This is why the companies frame the effort in terms of power density and cooling simultaneously: the two are coupled through conversion efficiency.

Market Context: A Power Semiconductor Race Alongside Memory and Packaging Constraints

The Infineon-NVIDIA announcement arrives in a broader semiconductor environment defined by AI infrastructure demand pressing on multiple supply chains at once. The same reporting cycle includes Tesla and NVIDIA reportedly committing KRW 3.7 trillion combined to expand Samsung Electro-Mechanics' advanced FC-BGA substrate production in South Korea, with Tesla's KRW 1.1 trillion securing supply for AI chips used in autonomous vehicles and Optimus robots from 2029 to 2033, and NVIDIA's reported KRW 2.6 trillion supporting AI data center semiconductor capacity.

Separately, Infineon and Wolfspeed have extended their long-term silicon carbide wafer supply agreement to include 200 mm substrates alongside existing 150 mm wafers, a multi-year deal supporting Infineon's transition to larger-wafer manufacturing. SiC demand is described as growing across electric vehicle charging, renewable energy, energy storage, and AI data center power infrastructure. Taken together, the GaN collaboration and the SiC supply extension indicate that Infineon is positioning across the full power semiconductor spectrum serving AI infrastructure.

Industry Impact: Power Becomes a Design Discipline

The strategic implication is that power delivery is moving from a procurement afterthought to an architectural discipline. The relevant comparison in the same news cycle is advanced packaging: Google is reportedly retaining Intel's EMIB-T packaging for its HumuFish TPU v9 despite substrate yields of around 35% in Q3 2026, below a 50% year-end target, with design revisions potentially delaying tape-out until January 2027 and shipments to Q1 2028. In both cases, the binding constraint on AI system deployment is not the logic device itself but the surrounding engineering: interconnect, packaging, and power.

For suppliers, this shifts competitive advantage toward companies that can co-design power stages with the system architecture they serve. Infineon's alignment with NVIDIA's MGX architecture is an example of that co-design model, in which the power converter is specified against a known rack topology rather than sold as a general-purpose component.

Implications for AI Data Centers

  • Higher intermediate bus switching frequencies reduce passive component volume, supporting denser rack layouts.
  • 800V DC distribution lowers current for a given power level, reducing distribution losses in megawatt-class racks.
  • Improved conversion efficiency reduces heat rejected into the facility, easing cooling requirements.
  • Support for racks up to 1 MW extends the ceiling for per-rack compute density.
  • Gradual 2027 deployment implies an incremental transition rather than a wholesale architecture swap.

Future Outlook

The stated 2027 deployment timeline is deliberately phased, which is consistent with the qualification burden of power semiconductors in data center environments. Converter designs must be validated for reliability, fault behavior, and long service life before volume adoption, and operators rarely re-architect power distribution at a single step.

The wider signal is that GaN is moving from niche, high-frequency applications into the mainstream power path of AI infrastructure, while SiC continues to serve adjacent high-power roles. If the 800V DC model gains traction across rack designs, the intermediate bus converter becomes a strategic component category, and the suppliers that establish reference designs with platform architects early will hold a durable position as rack power ratings continue to climb.