Overview

At the Open Compute Project (OCP) Global Summit 2026, held in San Jose from October 12 to 15, hyperscalers showcased a new generation of infrastructure designed to meet the extreme physical and economic constraints of AI data centers. With rack power densities surpassing 100kW and grid interconnection queues stretching five to seven years in major markets, the industry is rapidly pivoting away from legacy air-cooled, low-voltage architectures. The summit highlighted a convergence of high-voltage direct current (800V DC) power delivery, mainstream liquid cooling, and purpose-built inference silicon, signaling a fundamental re-architecture of the AI factory.

Technical Details: 800V DC and Liquid Cooling

The physical limits of traditional power distribution have been breached by AI workloads. Visionbay addressed this by unveiling its K-1 AI factory platform, built around an 800V DC architecture specifically sized for future NVIDIA Vera Rubin deployments. By utilizing higher voltage, the K-1 platform significantly reduces current for a given power level, thereby minimizing resistive losses across cables, busbars, and connectors. This efficiency compounds at the facility scale, a critical necessity as wholesale electricity costs near U.S. data centers rose by as much as 267% between 2020 and 2025.

Simultaneously, liquid cooling has migrated from GPU clusters into the networking layer. Meta debuted IcePack, its first liquid-cooled network rack, alongside the IceCube 102.4T switch platform. This marks a departure from the traditional air-cooled networking environments. Microsoft has further validated the thermal and economic benefits of liquid cooling, reporting up to a 15% gain in energy efficiency through two-phase immersion cooling in its Azure data centers compared to air-cooled equivalents. As rack densities routinely exceed the 50-60kW threshold where air cooling becomes economically unviable, direct-to-chip and immersion cooling are becoming mandatory infrastructure standards.

Market Context: The Inference Shift

The economics of AI compute are shifting heavily toward inference, which now accounts for roughly two-thirds of total AI compute spending. This concentration justifies the move toward custom silicon, as general-purpose GPUs carry circuitry for workloads that inference never utilizes. Google’s eighth-generation TPU 8i, announced in April 2026, targets this shift, claiming an 80% improvement in performance per dollar for inference over its predecessor. Microsoft’s Maia 200, built on TSMC’s 3nm process, entered production in early 2026 with dedicated tensor cores for inference economics. Its successor, the Maia 300, is slated for 2027, with Microsoft indicating internal testing shows further efficiency gains.

Industry Impact: Networking and Interconnects

Compute density at the 100kW+ level creates a networking challenge as complex as the thermal one. To prevent interconnects from becoming bottlenecks, the industry is focusing on 'scale-across' connectivity. Cisco introduced Silicon One G302 1.6T silicon and a joint effort with NVIDIA to develop the Ultra-Dense Small Form Factor Pluggable (USFP) standard, which offers 400G-per-lane pluggable optics. Broadcom showcased its Tomahawk 6 switches and third-generation TH6-Davisson Co-Packaged Optics, which integrate the optical interface directly into the switch package to reduce latency and power consumption. These advancements are essential for linking AI capacity across racks and regions without performance degradation.

Implications for AI Data Centers

The transition to 800V DC and liquid cooling is not limited to hyperscalers; the colocation sector is adopting these specifications to remain competitive. However, the primary constraint remains power availability. With grid queues extending up to seven years, hyperscalers are increasingly prioritizing on-site generation and direct renewable integration over traditional utility connections. Consequently, site selection is now driven primarily by available power capacity rather than traditional geographic or latency-based factors. The infrastructure required for gigawatt-scale AI facilities spans too many suppliers for proprietary interfaces to function without creating integration bottlenecks, making open standards essential for compressing deployment timelines.

Future Outlook: Standardization and Scale

The industry is moving toward unified blueprints to manage the complexity of next-generation AI factories. NVIDIA has contributed Vera Rubin rack and compute tray designs to the OCP through its open MGX architecture, providing a common mechanical and electrical baseline. Furthermore, Meta, Microsoft, and Alibaba are co-leading the Open Switch Platform Architecture (OSPA) to standardize power management and sensor control at the switch layer. A joint publication by NVIDIA, AMD, Google, and Meta—the Open Data Center Specification v0.7—defines unified blueprints for rack-scale blind-mate liquid cooling and interoperable interconnects. As the custom AI ASIC market is projected to reach $137.38 billion by 2035, these open standards will be the primary mechanism for hyperscalers to maintain the pace of AI infrastructure expansion.