Overview: The Megawatt-Scale AI Power Challenge

The rapid evolution of artificial intelligence, driven by the proliferation of generative models such as ChatGPT, Llama, Gemini, and DeepSeek, is fundamentally reshaping modern data center architecture. As computational demands surge, facilities are under immense pressure to deliver unprecedented power, energy efficiency, and thermal management. Current server-rack power levels typically range from 30 to 120 kW. However, leading computing companies are actively developing technologies to push this threshold to 1 MW. This tenfold increase necessitates a paradigm shift in power conversion and distribution, moving away from legacy systems toward high-voltage, high-density architectures enabled by advanced silicon-carbide (SiC) technology.

Market Context: Surging Energy Demands and Infrastructure Limits

The International Energy Agency (IEA) estimates that data centers consumed approximately 415 terawatt-hours (TWh) of electricity in 2024, representing about 1.5% of global electricity use. This figure is projected to more than double to 945 TWh by 2030, capturing a 3% global share. As AI racks surpass 200 kW, traditional 48- to 54-V DC distribution encounters critical bottlenecks, including:

  • Excessive physical space consumption, requiring up to 64U per rack for power shelves in systems like NVIDIA’s GB200/GB300 NVL72.
  • Unsustainable copper demands, with a 1-MW rack requiring over 200 kg, scaling to 500,000 tons for a 1-GW data center.
  • Significant energy losses and increased system complexity due to repeated AC-DC and DC-DC conversions.

Technical Details: Transitioning to High-Voltage DC Architectures

To overcome these physical and electrical limitations, the industry is transitioning to high-voltage DC bus architectures, specifically 400-V DC and 800-V DC. A highly efficient alternative involves converting 13.8 kV AC directly to 800-V high-voltage DC (HVDC) at the data center edge utilizing a solid-state transformer (SST). This approach drastically reduces conversion stages, minimizes energy loss, and simplifies the overall power chain. By requiring fewer power-supply units (PSUs) and cooling fans, the HVDC architecture improves overall system reliability, reduces thermal loads, and provides a scalable, high-performance foundation for next-generation AI infrastructure.

Optimizing Server PSUs: The Role of SiC Cascode JFETs

AI data centers rely on advanced server racks adhering to standards like Open Rack V3 (ORV3) from the Open Compute Project. Server PSUs must achieve high efficiency across wide load ranges, often meeting or exceeding 80 Plus Titanium or Ruby certifications. Traditional silicon superjunction MOSFETs struggle to meet these stringent demands due to thermal and switching limitations. To optimize power efficiency, SiC Cascode JFETs (CJFETs) are employed. These devices integrate a normally-on SiC JFET with a low-voltage silicon MOSFET to create a normally-off device. This cascode configuration delivers the lowest RDS(on) per unit area, enabling higher current handling and reduced conduction losses. Additionally, CJFETs offer fast switching speeds, smaller die sizes, and compatibility with standard silicon gate drivers, simplifying integration into complex power subsystems.

Implications for AI Data Centers: Protection and Scalability

Beyond PSUs, robust protection mechanisms are vital for safeguarding sensitive components during power events. Normally-on SiC JFETs and SiC Combo JFETs provide critical protection for high-voltage hot-swaps and eFuse/ORing applications. Within the AI server rack, these SiC technologies enable high-efficiency AC-DC and DC-DC conversion across essential power subsystems, including battery-backup units (BBU), peak load shaving shelves (PLSS), and intermediate bus converters (IBCs). The compact footprint and superior efficiency of these devices directly support the intense, fluctuating power profiles characteristic of heavy AI workloads, ensuring uninterrupted operation and enhanced energy management across the facility.

Future Outlook: Enabling Next-Generation AI Infrastructure

The transition to megawatt-scale AI infrastructure represents a critical juncture for the semiconductor and data center industries. By abandoning the constraints of 48-V DC distribution in favor of 800-V HVDC architectures, facilities can drastically reduce their copper footprint and physical space requirements. The deployment of advanced SiC JFET families, including CJFETs and Combo JFETs, provides the necessary fast switching, low conduction loss, and robust protection to make these high-density environments viable. As generative AI models continue to expand in complexity, leveraging these next-generation power technologies will be essential for building sustainable, scalable, and highly efficient AI data centers capable of supporting the future of artificial intelligence.